Non-preemptive Scheduling of Real-Time Software Transactional Memory

Recent embedded processor architectures containing multiple heterogeneous cores and non-coherent caches, bring renewed attention to the use of Software Transactional Memory (STM) as a building block for developing parallel applications. STM promises to ease concurrent and parallel software development, but relies on the possibility of abort conflicting transactions to maintain data consistency, which affects the execution time of tasks carrying transactions. Thus, execution time overheads resulting from aborts must be limited, otherwise the timing behaviour of the task set will not be predictable. In this paper we formalise a FIFO-based algorithm to order the sequence of commits of concurrent transactions. Furthermore, we propose and evaluate two non-preemptive scheduling strategies, in order to avoid transaction starvation. Non-preemptive scheduling of Real-Time Software Transactional Memory António Barros and Luís Miguel Pinho CISTER/INESC-TEC School of Engineering of the Polytechnic Institute of Porto Porto, Portugal {amb,lmp}@isep.ipp.pt Abstract. Recent embedded processor architectures containing multiple heterogeneous cores and non-coherent caches, bring renewed attention to the use of Software Transactional Memory (STM) as a building block for developing parallel applications. STM promises to ease concurrent and parallel software development, but relies on the possibility of abort conflicting transactions to maintain data consistency, which affects the execution time of tasks carrying transactions. Thus, execution time overheads resulting from aborts must be limited, otherwise the timing behaviour of the task set will not be predictable. In this paper we formalise a FIFO-based algorithm to order the sequence of commits of concurrent transactions. Furthermore, we propose and evaluate two non-preemptive scheduling strategies, in order to avoid transaction starvation. Recent embedded processor architectures containing multiple heterogeneous cores and non-coherent caches, bring renewed attention to the use of Software Transactional Memory (STM) as a building block for developing parallel applications. STM promises to ease concurrent and parallel software development, but relies on the possibility of abort conflicting transactions to maintain data consistency, which affects the execution time of tasks carrying transactions. Thus, execution time overheads resulting from aborts must be limited, otherwise the timing behaviour of the task set will not be predictable. In this paper we formalise a FIFO-based algorithm to order the sequence of commits of concurrent transactions. Furthermore, we propose and evaluate two non-preemptive scheduling strategies, in order to avoid transaction starvation.